1. Field of the Invention
The present invention relates to a data compression and display memory apparatus, and in particular to an improved data compression and display memory apparatus which is capable of providing a desired compression ratio by using a differential pulse code modulation and line interpolation technique for thus simplifying the construction of the apparatus.
2. Description of the Conventional Art
The image compression technique is widely used. In the field of a television broadcast system, the image compression technique is used for transmitting an image data using a direct broadcast satellite (DBS) system.
As the technique, there is known an MPEG II. The MPEG II is capable of obtaining a high compression ratio of an image data and a high resolution image compared to other image compression techniques.
In addition, the image compression technique is further used for storing a part of television image data using a storing apparatus installed in a television set. Among the techniques, there is known a compression technique of a wavelet method used for a television system with a play-back apparatus (Matsusita Co.).
However, the wavelet method has a good compression ratio but requires a floating operation since the same needs a multiple resolution technique, for thus causing a complicated hardware.
In addition, the differential pulse code modulation (DPCM) technique is directed to eliminating a redundancy component which exists in a neighboring pixel of a video signal and then compressing video signals. This compression technique does not have a desired compression ratio. However, the construction of the same is simple, so that the compression technique is used in various fields.
The method for compressing the data using the DPCM is disclosed in U.S. Pat. No. 4,173,771, and the method for converting the input data and the reading/writing the data from/into the memory is disclosed in U.S. Pat. Nos. 4,101,926 and 4,134,131.
FIG. 1 illustrates a conventional video signal capture system.
As shown therein, the conventional video signal capture system includes a synchronous separator 11 for separating a synchronous signal from a video signal, a clock signal generator 12 for generating a clock signal in accordance with a synchronous signal from the synchronous separator 11, an analog/digital (A/D) converter 13 for digitally converting a video signal inputted, an interleaver 14 for interleaving the digital data from the AND converter 13 by the line unit in accordance with the synchronous signal from the synchronous separator 11, a prediction encoder 15 for prediction-coding the output from the interleaver 14 and for outputting the output to a transmission channel, a timing signal separator 16 for separating a timing signal from the prediction-coded data from the transmission channel, a clock signal generator 17 for generating a clock signal in accordance with a timing signal from the timing signal separator 16, a prediction decoder 18 for decoding the prediction-coded data inputted through the transmission channel, a reverse interleaver 19 for reversely interleaving the output from the prediction decoder 18, and a digital/analog (D/A) converter 20 for converting the output from the reverse interleaver 19 into an analog video signal.
Here, the clock signal from the clock signal generator 12 having a sample frequency fs is inputted into the A/D converter 13, the interleaver 14, and the prediction encoder 15, respectively, and the clock signal from the clock signal generator 17 having the sample frequency fs is inputted into the prediction decoder 18, the reverse interleaver 19, and the D/A converter 20, respectively.
The operation of the conventional video signal capture system will now be explained with reference to FIG. 1.
When a video signal is inputted, the synchronous separator 11 separates a synchronous signal (a horizontal or vertical synchronous signal) from the video signal and outputs the signal to the clock signal generator 12 and the interleaver 14, and the clock signal generator 12 generates a clock signal in synchronization with the synchronous signal and then outputs the signal to the A/D converter 13, the interleaver 14, and the prediction encoder 15, respectively.
As a result, the video signal inputted is converted into the digital video signal by the A/D converter 13, and then is interleaved by the line unit by the interleaver 14. The interleaved data is coded by the prediction encoder 15, and is outputted to the transmission channel. At this time, the interleaver 14 performs a line delay which is needed for a prediction encoding and mixes two lines as one line.
In addition, the prediction-coded data from the transmission channel is processed in the reverse sequence of the above-described process, and then is demodulated into a video signal.
Namely, the timing signal separator 16 separates a timing signal from the prediction-coded data from the transmission channel and then outputs the signal to the clock generator 17 and the reverse interleaver 19, respectively, and the clock signal generator 17 generates a clock signal in accordance with the timing signal and then outputs the signal to the prediction decoder 18, the reverse interleaver 19, and the D/A converter 20, respectively.
Therefore, the prediction-coded data from the transmission channel is decoded by the prediction decoder 18, and the thusly decoded data is reversely interleaved by the reverse interleaver 19 and then is analog-converted by the D/A converter 20 and is outputted as a video signal. At this time, the reverse interleaver 19 changes the data in which two lines are mixed to an original state.
However, since the conventional video signal capture system uses simples the differential pulse code modulation (DPCM), the compression efficiency is significantly decreased.